1. Field of the Invention
The present invention relates to semiconductor devices and methods of manufacturing the same, and in particular to a semiconductor device wherein one device has a plurality of gate oxide films with different film thicknesses, and a method of manufacturing the same.
2. Description of the Background Art
In recent years, with integration of semiconductor devices, a device (dual gate oxide device) having gate oxide films with different thicknesses in one chip has been increasingly used. The dual gate oxide device has been significantly increasingly used particularly for a device in which a memory device including a dynamic random access memory (DRAM) and a logic device are mounted in a mixed manner.
A method of manufacturing a semiconductor device having a conventional dual gate oxide will now be described.
FIGS. 57-62 are schematic cross sectional views illustrating steps of a method of manufacturing a semiconductor device having a conventional dual gate oxide. Referring first to FIG. 57, a field oxide film 2 is formed at a surface of a silicon substrate 1 and thermal oxidation is then applied.
Referring to FIG. 58, the thermal oxidation allows a first gate oxide film 6a to be formed on a surface of silicon substrate 1. A normal photolithography technique is employed to form a resist pattern 61a on a predetermined region. The first gate oxide film 6a that is not covered by resist pattern 61a is removed through e.g. wet-etching.
Referring to FIG. 59, the wet-etching causes a surface of silicon substrate 1 to be exposed at the portion from which silicon oxide film 6a is removed. After resist pattern 61a is removed, thermal oxidation is again applied.
Referring to FIG. 60, the thermal oxidation allows a second gate oxide film 6b to be formed on an exposed surface of silicon substrate 1 and the first gate oxide film 6a to be increased in thickness. Thus the film thickness of the first gate oxide film 6a is greater than that of the second gate oxide film 6b to form a dual gate oxide.
Referring to FIG. 61, a conductive layer 7 for a gate is formed on the entire surface. A normal photolithography technique is employed to form a resist pattern 61b on a predetermined region of conductive layer 7 for a gate. Resist pattern 61b is used as a mask to etch conductive layer 7. Then resist pattern 61b is removed.
Referring to FIG. 62, this etching allows conductive layer 7 for a gate to be patterned to form a gate electrode layer 7. Gate electrode layer 7, field oxide film 2 and the like are used as a mask for injection of an impurity to form source/drain region 8a, 8b at a surface of silicon substrate 1. Thus a metal oxide semiconductor (MOS) transistor having relatively thick gate oxide film 6a and a MOS transistor having relatively thin gate oxide film 6b are obtained.
While the method described above allows formation of dual gate oxide, it requires different thermal oxidation steps for forming gate oxide films having different thicknesses and this results in a cumbersome manufacturing process. Methods of formation of dual gate oxide in a simpler process have been disclosed in e.g. Japanese Patent Laying-Open Nos. 7-297298, 9-92729 and 63-205944. A method disclosed in Japanese Patent Laying-Open No. 7-297298 will now be exemplarily described.
FIGS. 63-65 are schematic cross sectional views illustrating steps of the method of manufacturing a semiconductor device having a dual gate oxide that is disclosed in Japanese Patent Laying-Open No. 7-297298. Referring first to FIG. 63, a field oxide film 2 is formed at a surface of a silicon substrate 1.
Referring to FIG. 64, a normal photolithography technique is employed to form a resist pattern 71 on silicon substrate 1 at a predetermined region. An oxidation promoting substance, such as F or Cl, as a substance from the halogen group is ion-injected into a surface of silicon substrate 1 that is not covered by resist pattern 71. Then resist pattern 71 is removed.
Referring to FIG. 65, an oxidation step is provided to form a gate oxide film. In this oxidation step, the substance from the halogen group acts to promote oxidation. Thus gate oxide film 6a formed at a region which is ion-injected with an oxidation promoting substance is formed thicker than gate oxide film 6b formed at a region which is not ion-injected with the oxidation promoting substance. Thus a dual gate oxide is formed.
The method shown in FIGS. 63-65 allows dual gate oxide to be formed with one oxidation step and can thus simplify the process.
Japanese Patent Laying-Open No. 7-297298 also discloses a method of forming a dual gate oxide with one oxidation step by ion-implanting nitrogen (N) as an oxidation restraining substance rather than an oxidation promoting substance.
For this ion injection, it is difficult to draw ions with an acceleration energy of less than 1 keV. Thus, ion-injecting an oxide promoting substance or an oxide restraining substance requires an injection energy of at least 1 keV. However, if ions are injected with the injection energy of at least 1 keV, the oxidation promoting substance or oxidation restraining substance will be distributed to a location more than 2 nm deeper than the surface of silicon substrate.
According to the method described above, an oxidation promoting substance or an oxidation restraining substance is introduced into silicon substrate 1 through ion injection. The ion injection is a technique of physically injecting ions into silicon substrate 1 and the injection energy is relatively large. Thus, ion injection of an oxidation promoting substance and the like results in a large number of lattice defects at a surface of silicon substrate 1 and thus significantly damages the surface of silicon substrate 1. In order to repair the significant damage, a thermal process (annealing) step is additionally required and thus renders the manufacturing process cumbersome.
An object of the present invention is to provide a semiconductor device having a dual gate oxide with the substrate less damaged in a simplified process, and a method of manufacturing the same.
A semiconductor device according to the present invention includes a semiconductor substrate, first and second gate oxide films, and an oxidation rate adjusting substance. The semiconductor substrate has first and second regions. The first gate oxide film is formed in the first region such that the first gate oxide film is in contact with a main surface of the semiconductor substrate. The second gate oxide film is formed in the second region such that the second gate oxide film is in contact with a main surface of the semiconductor substrate. The second gate oxide film is different in thickness from the first gate oxide film. The oxidation rate adjusting substance is only added within a depth range of no more than 2 nm from the main surface of the semiconductor substrate in the first region.
The semiconductor device according to the present invention has an oxidation rate adjusting substance distributed only within a depth range of no more than 2 nm from a main surface of the semiconductor substrate, i.e. to a location shallower more than conventional. Thus the energy required in adding the oxidation rate adjusting substance can be greatly reduced as compared with that required for conventional ion injection. Thus a semiconductor device can be obtained which is less damaged by lattice defect and the like.
In the above semiconductor device, preferably the oxidation rate adjusting substance is an oxidation promoting substance and the first gate oxide film is greater in thickness than the second gate oxide film.
Thus, when gate oxidation is applied to the first and second regions, simultaneously the first region with the oxidation promoting substance added thereto can be greater in gate oxide film thickness than the second region without the oxidation promoting substance added thereto.
For the above semiconductor device, the oxidation promoting substance is preferably a halogen.
Thus the oxidation promoting effect of the halogen can be utilized.
For the above semiconductor substrate, preferably the oxidation rate adjusting substance is an oxidation restraining substance and the first gate oxide film is thinner than the second gate oxide film.
Thus, if gate oxidation is applied to the first and second regions simultaneously, the first region with the oxidation restraining substance added thereto can be greater in gate oxide film thickness than the second region without the oxidation restraining substance added thereto.
For the above semiconductor device, the oxidation restraining substance is preferably nitrogen.
Thus the oxidation restraining effect of nitrogen can be utilized.
A semiconductor device manufacturing method according to the present invention is a method of manufacturing a semiconductor device including gate oxide films each having a different thickness on first and second regions of the main surface of the semiconductor substrate and the semiconductor device manufacturing method according to the present invention includes the following steps:
Initially the first region of the main surface of the semiconductor substrate is exposed to a plasma of a gas containing an oxidation rate adjusting substance to add the oxidation rate adjusting substance to the first region of the main surface of the semiconductor substrate. Then the first and second regions of the main surface of the semiconductor substrate are simultaneously oxidized to form a first gate oxide film on the first region and a second gate oxide film on the second region free from addition of the oxidation rate adjusting substance, wherein the first gate oxide film is different in thickness from the second gate oxide film.
In the semiconductor device manufacturing method according to the present invention, exposure to plasma causes an oxidation rate adjusting substance to be added to the semiconductor substrate. According to the method of adding an oxidation rate adjusting substance, the energy required in adding it can be greatly reduced as compared with conventional ion injection, to reduce damage to the semiconductor substrate, such as lattice defect. Thus the damage can be readily repaired simply by e.g. the thermal oxidation for forming the gate oxide film. This can eliminate an additional thermal oxidation step for damage repair as conventional and thus simplify the process.
For the above semiconductor device manufacturing method, preferably the oxidation rate adjusting substance is an oxidation promoting substance and the first gate oxide film is thicker in film thickness than the second gate oxide film.
Thus, if gate oxidation is applied to the first and second regions simultaneously, the first region with the oxidation promoting substance added thereto can be greater in gate oxide film thickness than the second region without the oxidation promoting substance added thereto.
For the above semiconductor device manufacturing method, preferably the oxidation promoting substance is a halogen.
Thus the oxidation promoting effect of the halogen can be utilized.
For the above semiconductor device manufacturing method, a gas containing the oxidation rate adjusting substance is preferably a gas containing at least one selected from the group consisting of NF3, SF6, F2, HF, ClF3, Cl2, HCl, BCl3 and HBr.
Thus a gas can be selected depending on various conditions.
For the above semiconductor device manufacturing method, preferably the oxidation rate adjusting substance is an oxidation restraining substance and the first gate oxide film is thinner than the second gate oxide film.
Thus, if gate oxidation is applied to the first and second regions simultaneously, the first region with the oxidation restraining substance added thereto can be thinner in gate oxide film thickness than the second region without the oxidation restraining substance added thereto.
For the above semiconductor device manufacturing method, preferably the oxidation restraining substance is nitrogen.
Thus the oxidation restraining effect of nitrogen can be utilized.
For the above semiconductor device manufacturing method, a gas containing the oxidation rate adjusting substance is preferably a gas containing at least one selected from the group consisting of N2, N2O and NOx.
Thus, a gas can be selected depending on various conditions.
Preferably the above semiconductor device manufacturing method further includes the steps of: depositing a conductive layer and a covering layer successively on the first and second gate oxide films; selectively removing and patterning the conductive layer and the covering layer; with the patterned conductive layer and covering layer used as a mask, forming an element separation structure at a region from which the conductive layer and the covering layer are removed; and further patterning the patterned conductive layer to form a gate electrode layer.
According to this method, a conductive layer is formed before an element isolation structure is formed, to avoid forming the conductive layer on a step resulting from the element isolation structure, as is when a conductive layer is formed after an element separation structure is formed. Thus, if the conductive layer is patterned in forming the gate electrode, any residue of the conductive layer will not be produced at a sidewall of an underlying step. Preventing such production of the residue can prevent disadvantageous short-circuit between conductive layers.
For the above semiconductor device manufacturing method, preferably the step of forming an element separation structure includes the step of applying a thermal oxidation process with the patterned conductive layer and covering layer used as a mask to form a field oxide film at a main surface of the semiconductor substrate.
Thus, the field oxide film can be formed while production of residue can be prevented.
For the above semiconductor device manufacturing method, preferably the step of forming an element separation structure includes the steps of: etching a main surface of the semiconductor substrate with the patterned conductive layer and covering layer used as a mask to form a trench in the main surface of the semiconductor substrate; and filling the trench with a buried layer to form a trench separation structure.
Thus the trench separation structure can be formed while production of residue can be prevented.
Preferably the above semiconductor device manufacturing method further includes the following steps:
Initially a first conductive layer, an insulation layer and a covering layer are deposited successively on the first and second gate oxide films. Then the first conductive layer, the insulation layer and the covering layer are selectively removed and patterned such that they remain on each of the first and second gate oxide films. Then, the patterned first conductive layer, insulation layer and covering layer are used as a mask for etching a main surface of the semiconductor substrate to form a trench in the main surface of the semiconductor substrate. Then a buried layer is formed which fills the trench and an upper surface of which is located higher than an upper surface of the first conductive layer. Then the covering layer is entirely removed to expose the insulation layer. Then the insulation layer on one gate oxide film of the first and second gate oxide films and a portion of the buried layer adjacent to the insulation layer on one gate oxide film are isotropically etched to remove the insulation layer on one gate oxide film to thus expose the conductive layer on one gate oxide film as well as form a gentle sidewall at the buried layer. Then a second conductive layer is formed in contact with the first conductive layer on one gate oxide film and in contact with the insulation layer on the other gate oxide film. Then the first and second conductive layers are patterned to form a first gate electrode layer formed of the first and second conductive layers on one gate oxide film and a second gate electrode layer formed of the first conductive layer on the other gate oxide film.
According to this method, the isolation layer on either one of the gate oxide films is etched away through isotropic etching. This isotropic etching results in a gentle, round sidewall of the etched portion. Accordingly, if the second conductive layer is formed thereon and patterned for forming a gate electrode, residue of the second conductive layer is hardly produced at the gentle sidewall portion. Thus, production of residue of the second conductive layer can be restrained in providing a gate electrode layer in a deposited structure of the first and second conductive layers.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.